SN74LVC32ADBR Quadruple 2-Input Positive-OR Gate

Features

• Operate From 1.65 V to 3.6 V
• Specified From ¨C40¡ãC to 85¡ãC, ¨C40¡ãC to 125¡ãC, and ¨C55¡ãC to 125¡ãC
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 3.8 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce)
     <0.8 V at V_CC = 3.3 V, T_A = 25¡ãC
• Typical V_OHV (Output V_OH Undershoot)
     >2 V at V_CC = 3.3 V, T_A = 25¡ãC
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

Description

The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V V_CC operation.

The ¡¯LVC32A devices perform the Boolean function Y = A + B or Y = (A\ • B\)\ in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

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